SMBUS Core

Highlights

• SMBus Master controller operation compliant to SMBus 2.0 specifications
• SMBus Master supports Multi-master
• Software selectable acknowledge bit
• Arbitration lost interrupt
• START and STOP signal generation
• Repeated START signal generation
• SMBus Master controller has ability to generate or detect Ack/Nack
• SMBus Master controller has retry buffer programmable to retry nacked transactions 'N' time
• Bus busy detection
• 100 KHz operation on SMBus Interface
  

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