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  SMBUS DIP

SMBUS Verification IP

The Perfectus VIP for SMBus provides an efficient algorithm to verify the SMBus based designs by giving the advance techniques including the support for System Verilog assertions.

AMB

Highlights

  • Compliant to SMBus 2.0 specification
  • Generates and drives bus traffic as a SMBus 2.0 Requester
  • Responds to transactions as a SMBus 2.0 Slave comes as
  • Generic and compatible with two wire serial EEPROM
  • Commands and Knobs that change with every transaction
  • Knobs to configure cycles
  • Ability to carry over parameters across transactions
  • For passing data
  • For injecting different types of errors
  • Ability to inject Packet Error Checking (PEC) error & protocol error
  • Ability to inject error in any phase in a transaction
  • Ability to add multiple errors in a cycle randomly

Product Components

  • Verification Engine
  • Bus Functional Models
  • Directed & Random tests generator
  • Compliance Test Suite
  • Assertions
  • Error injector
  • Report generator
  • Transaction generator
  • Protocol Checker
  • Protocol Monitor

For more information on each component and evaluation copy please email to: info@perfectus.com Or call 408 748 8900 x 5651

  © 2007 Perfectus Tecnology Inc,