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Genie-SPI 4.2
Genie-SPI 4.2 is a Verification IP solution for SPI 4.2 designs.
Genie-SPI 4.2 is fully compliant to support both PHY and MAC (link) layers.
The verification IP is configurable to ‘N’
channels, with user-defined or default port arbitration,
skew/deskew, tests with ATM, PPP, Ethernet, and user-defined
byte streams, which covers all aspects of verification.
Highlights
- Conforms to Optical Internetworking Forum specification
OIFSPI4-02.0 System Packet Interface Level 4 Phase
2 standard (SPI 4.2)
- SPI 4.2 verification environment has configurable
data path width (32 bits, 64 bits, 128 bits, etc)
- SPI 4.2 bus functional models supports ‘N’
Asymmetric ports and calendar lengths up to 1024,
allowing for uneven bandwidth allocation across channels
- Flexible start of packet (SOP) alignment to a byte
lane
- FIFO buffer status management and indications
- Run-time programmable calendar length, burst size,
and threshold levels
- SPI 4.2 verification IP is encompassed with Bus
Arbitration Scheme with channel fairness - user programmable
weighting and length
- Error detection and handling
- SPI 4.2 BFM supports dynamic bit de-skew over full
frequency range
- Configurable training patterns
- Allows for per-port configurable maxburst values
creating maximum flexibility
Product Components
- SPI 4.2 protocol Verification Engine
- SPI 4.2 compliant Bus Functional Models
- Directed & Random tests generator
- Compliance Test Suite
- Assertions
- Error injector
- Report generator
- Transaction generator
- SPI 4.2 Protocol Checker
- SPI 4.2 Protocol Monitor
For more information on each component and evaluation
copy please email to: info@perfectus.com
Or call 408 748 8900 x 5651
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